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Reducing Evaluation Cost for Circuit Synthesis Using Active Learning

[+] Author Affiliations
Tinghao Guo, Daniel R. Herber, James T. Allison

University of Illinois at Urbana-Champaign, Urbana, IL

Paper No. DETC2018-85654, pp. V02AT03A011; 11 pages
doi:10.1115/DETC2018-85654
From:
  • ASME 2018 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
  • Volume 2A: 44th Design Automation Conference
  • Quebec City, Quebec, Canada, August 26–29, 2018
  • Conference Sponsors: Design Engineering Division, Computers and Information in Engineering Division
  • ISBN: 978-0-7918-5175-3
  • Copyright © 2018 by ASME

abstract

In this article, an active learning strategy is introduced for reducing evaluation cost associated with system architecture design problems and is demonstrated using a circuit synthesis problem. While established circuit synthesis methods, such as efficient enumeration strategies and genetic algorithms (GAs), are available, evaluation of candidate architectures often requires computationally-expensive simulations, limiting the scale of solvable problems. Strategies are needed to explore architecture design spaces more efficiently, reducing the number of evaluations required to obtain good solutions. Active learning is a semi-supervised machine learning technique that constructs a predictive model. Here we use active learning to interactively query architecture data as a strategy to choose which candidate architectures to evaluate in a way that accelerates effective design search. Active learning is used to iteratively improve predictive model accuracy with strategically-selected training samples. The predictive model used here is an ensemble method, known as random forest. Several query strategies are compared. A circuit synthesis problem is used to test the active learning strategy; two complete data sets for this case study are available, aiding analysis. While active learning has been used for structured outputs, such as sequence labeling task, the interface between active learning and engineering design, particularly circuit synthesis, has not been well studied. The results indicate that active learning is a promising strategy in reducing the evaluation cost for the circuit synthesis problem, and provide insight into possible next steps for this general solution approach.

Copyright © 2018 by ASME
Topics: Circuits

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