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A Methodology for Addressing Defects in Transfer Moulding as an Encapsulating Technique for Semi-Conductors

[+] Author Affiliations
Philip Farrugia, Pierre Vella

University of Malta, Msida, Malta

Godwin Cutajar Kinsella

ST Microelectronics Malta Ltd, Malta

Paper No. DETC2014-34121, pp. V01BT02A011; 10 pages
  • ASME 2014 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
  • Volume 1B: 34th Computers and Information in Engineering Conference
  • Buffalo, New York, USA, August 17–20, 2014
  • Conference Sponsors: Design Engineering Division, Computers and Information in Engineering Division
  • ISBN: 978-0-7918-4629-2
  • Copyright © 2014 by ASME


One of the manufacturing steps involved in fabricating semiconductor devices is encapsulation, whose function is to protect the semiconductor device by sealing the package from environmental hazards such as heat, humidity and vibration. Transfer moulding, as an encapsulation technique, offers various advantages over other techniques such as injection moulding. In most cases it is difficult to foresee the effect of a design decision on a complex semiconductor process such as transfer moulding, since process robustness is rarely a function of a single property and is affected by several different parameters. A literature review reveals that whilst support has been developed to help relevant stakeholders to detect and rectify problems associated with fabrication of semiconductors, such as die design, photolithography and ion implantation, support aimed at guiding process engineers and other relevant stakeholders to rapidly deal with transfer moulding defects, are lacking. Within this context, the research reported in this paper is aimed at developing a methodology relevant to transfer moulding which guides stakeholders in identifying and rectifying mouldability problems concerning new semiconductor devices. The proposed methodology is aimed at capitalizing efforts on the production preparation phase of the Integrated Product Development model before problematic semiconductor products reach the execution phase. The methodology is the key contribution of this paper. The evaluation results collectively provide a degree of evidence that the developed methodology helps relevant stakeholders in this direction.

Copyright © 2014 by ASME



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