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A Study on the Internal Thermal Problems for Low Temperature Furnace in Semiconductor Processing

[+] Author Affiliations
Kang-Woo Joo, Duwon Jeong, Kwang-Sun Kim

Korea University of Technology and Education, Cheonan, Chungnam, Korea

Mason Suh

YesT Co., Ltd., Pyeongtaek, Gyeonggi, Korea

Paper No. IMECE2012-87205, pp. 3061-3066; 6 pages
  • ASME 2012 International Mechanical Engineering Congress and Exposition
  • Volume 7: Fluids and Heat Transfer, Parts A, B, C, and D
  • Houston, Texas, USA, November 9–15, 2012
  • Conference Sponsors: ASME
  • ISBN: 978-0-7918-4523-3
  • Copyright © 2012 by ASME


The low temperature furnace for semiconductor processing is applicable not only to the equipment which needs heat treatment on the silicon wafer but also to the industry field similar to semiconductor manufacturing. The target process in this research is for the low temperature furnace less than 500°C. The investigation on controlling the flat zone at low temperature range has been important with the recent development trend of miniaturized device and new materials. When the temperature in the furnace is changing, the temperature changing rate is slower at the batch type than the single type. The thermal problems therefore occur including the unnecessary heat treatment and the thermal shock of wafer for the sudden heat change. The research target is therefore to obtain the uniform temperature distribution in a whole furnace when manufacturing the low temperature heat treatment equipment. The precise control of the temperature of the reactor is a crucial factor obtaining the vapor deposition uniformity on the wafer surface. In this research, we validate the reliability of numerical analysis by being compared with the experimental results. And the different parameters that affect the internal temperature distribution including the radiant heat transfer are investigated using CFD for designing and manufacturing the furnace. To obtain the uniform temperature distribution of the reactor, the emissivity and reflectivity of pedestals which are installed under the wafer cartridge are also changed and investigated along with the different number of pedestals and distance of pedestals from the bottom of the wafer cartridge. As the results, the most effective design factor is the temperature of each heater to make the wafer temperature uniform. Additionally, the yield rate per one process is increased when the number of wafers is increased because the flat zone is widened.

Copyright © 2012 by ASME



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