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Integration, Development and Performance of the 500 TFLOPS Heterogeneous Cluster (Condor)

[+] Author Affiliations
Mark Barnell, Qing Wu, Richard Linderman

Air Force Research Laboratory Information Directorate, Rome, NY

Paper No. DETC2012-70083, pp. 771-778; 8 pages
doi:10.1115/DETC2012-70083
From:
  • ASME 2012 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference
  • Volume 2: 32nd Computers and Information in Engineering Conference, Parts A and B
  • Chicago, Illinois, USA, August 12–15, 2012
  • Conference Sponsors: Design Engineering Division, Computers and Information in Engineering Division
  • ISBN: 978-0-7918-4501-1

abstract

The Air Force Research Laboratory Information Directorate Advanced Computing Division (AFRL/RIT) High Performance Computing Affiliated Resource Center (HPC-ARC) is the host to a very large scale interactive computing cluster consisting of about 1800 nodes. Condor, the largest interactive Cell cluster in the world, consists of integrated heterogeneous processors of IBM Cell Broadband Engine (Cell BE) multicore CPUs, NVIDIA General Purpose Graphic Processing Units (GPGPUs) and Intel x86 server nodes in a 10Gb Ethernet Star Hub network and 20Gb/s Infiniband Mesh, with a combined capability of 500 trillion floating operations per second (TFLOPS). Applications developed and running on CONDOR include large-scale computational intelligence models, video synthetic aperture radar (SAR) back-projection, Space Situational Awareness (SSA), video target tracking, linear algebra and others. This presentation will discuss the design and integration of the system. It will also show progress on performance optimization efforts and lessons learned on algorithm scalability on a heterogeneous architecture.

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