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Thermal Characterization of Planar Interconnect Architectures Under Transient Currents

[+] Author Affiliations
Banafsheh Barabadi, Yogendra K. Joshi, Satish Kumar

Georgia Institute of Technology, Atlanta, GA

Gamal Refai-Ahmed

Advanced Micro Devices, Inc., Markham, ON, Canada

Paper No. IMECE2009-11996, pp. 1381-1389; 9 pages
doi:10.1115/IMECE2009-11996
From:
  • ASME 2009 International Mechanical Engineering Congress and Exposition
  • Volume 9: Heat Transfer, Fluid Flows, and Thermal Systems, Parts A, B and C
  • Lake Buena Vista, Florida, USA, November 13–19, 2009
  • Conference Sponsors: ASME
  • ISBN: 978-0-7918-4382-6 | eISBN: 978-0-7918-3863-1
  • Copyright © 2009 by ASME

abstract

The quality and reliability of interconnects in microelectronics is a major challenge considering the increasing level of integration and high current densities. This work studied the problem of transient Joule heating in interconnects in a two-dimensional (2D) inhomogeneous model. The transmission line matrix (TLM) method was implemented with link-resistor (LR) and link-line (LL) formulations, and the results were compared with a finite element (FE) model that was developed in LSDyna. This comparison showed that the overall behavior of the TLM models were in good agreement with the FE model while, near the heat source, the transient TLM solutions developed slower than the FE solution. The steady-state results of the two models were identical. The two TLM formulations yielded slightly different transient results, with the LL result growing slower particularly at the source boundary and becoming unstable at short time-steps. It was concluded that the LR formulation is more accurate for transient thermal analysis. Computational efficiency of the TLM method and its ability to accept non-uniform 2D and 3D mesh and variable time-step makes it a good candidate for multi-scale analysis of Joule heating in the interconnects.

Copyright © 2009 by ASME

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