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Deformation and Strain Measurement of Flip-Chip Solder Bump Under In-Situ Thermal Loading

[+] Author Affiliations
Jae B. Kwak, Dong Gun Lee, Tung Nguyen, Seungbae Park

Binghamton University, State University of New York, Binghamton, NY

Paper No. IMECE2009-12641, pp. 311-318; 8 pages
doi:10.1115/IMECE2009-12641
From:
  • ASME 2009 International Mechanical Engineering Congress and Exposition
  • Volume 5: Electronics and Photonics
  • Lake Buena Vista, Florida, USA, November 13–19, 2009
  • Conference Sponsors: ASME
  • ISBN: 978-0-7918-4378-9 | eISBN: 978-0-7918-3863-1
  • Copyright © 2009 by ASME

abstract

Thermo-mechanical behavior of solder joints, especially the solder bumps located at the chip corners where most failures usually occur was investigated. Digital Image Correlation (DIC) technique with optical microscope was adopted to quantify the deformation behavior and strains of a solder bump of flip-chip package subjected to thermal loading. A flip-chip specimen was cross-sectioned after manual polishing process followed by wet etching method in order to generate natural speckle patterns with high enough contrast on the measuring surface for employing DIC technique. The sample was placed in a miniature heating chamber and subjected to in-situ thermal loading from 25 °C to 100°C. During the heating, sequential microscopic images of the cross-sectioned surface of a solder bump were acquired, and the deformation behavior and strain distributions were successfully measured with submicron accuracy by applying DIC technique on the captured images. The computed full-field displacement fields clearly depicted both normal and shear deformation of the solder bump under the thermal loading. In addition, from the strain fields, it was observed that strains were mostly concentrated on the bottom portion of solder bump near the pad connected to substrate. In order to assess the thermo-mechanical strains of the flip-chip interconnections more quantitatively, the average strains of solder joints at different locations were also measured and compared to one another. By doing so, the strain trends of solder bumps were effectively analyzed with respect to the distance to neutral point (DNP). Finally, finite element analysis was conducted by simulating the thermal loading applied in the experiments, and comparison between the simulation and experimental results of displacements and strains was made. The comparison results exhibited satisfactory agreement, which ensured the validity of the experimental data and methodology. This study can further expedite the studies of electronic-package reliability through fatigue and crack failure analysis of the solder joints due to thermal cyclic loading.

Copyright © 2009 by ASME

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