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Lapping of Semiconductor Wafers: An Experimental Investigation on Subsurface Damage

[+] Author Affiliations
P. F. Zhang, Z. J. Pei

Kansas State University, Manhattan, KS

Paper No. MSEC2009-84114, pp. 715-719; 5 pages
  • ASME 2009 International Manufacturing Science and Engineering Conference
  • ASME 2009 International Manufacturing Science and Engineering Conference, Volume 1
  • West Lafayette, Indiana, USA, October 4–7, 2009
  • Conference Sponsors: Manufacturing Engineering Division
  • ISBN: 978-0-7918-4361-1 | eISBN: 978-0-7918-3859-4
  • Copyright © 2009 by ASME


Semiconductor substrate wafers are used to manufacture a variety of semiconductor devices. Lapping is an important process to obtain flat wafer surfaces. Subsurface damage, however, is unavoidably generated during the lapping process and has vital effects on wafer quality. Experiments were conducted to study the effects of several lapping parameters on subsurface damage in semiconductor substrate wafers, such as abrasive grain size, abrasive material, lapping pressure, and slurry concentration. It was found that abrasive grain size and abrasive material have significant effects on subsurface damage. Effects of lapping pressure and slurry concentration on subsurface damage were less significant.

Copyright © 2009 by ASME



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