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Effects of TSV (Through Silicon Via) Interposer/Chip on the Thermal Performances of 3D IC Packaging

[+] Author Affiliations
John H. Lau, Gong Yue Tang, Germaine Yen Yi Hoe, Xiao Wu Zhang, Tai Chong Chai, Pinjala Damaruganath, Kripesh Vaidyanathan

Hong Kong University of Science & Technology, Hong Kong, China

Paper No. InterPACK2009-89380, pp. 67-74; 8 pages
doi:10.1115/InterPACK2009-89380
From:
  • ASME 2009 InterPACK Conference collocated with the ASME 2009 Summer Heat Transfer Conference and the ASME 2009 3rd International Conference on Energy Sustainability
  • ASME 2009 InterPACK Conference, Volume 1
  • San Francisco, California, USA, July 19–23, 2009
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 978-0-7918-4359-8 | eISBN: 978-0-7918-3851-8
  • Copyright © 2009 by ASME

abstract

Thermal performances of 3D SiP (system-in-package) with TSV (through silicon via) interposer/chip are investigated based on heat-transfer CFD (computational fluid dynamic) analyses. Emphases are placed on the determination of (1) the equivalent thermal conductivity of interposers/chips with various copper-filled, aluminum-filled, and polymer w/o filler filled TSV diameters, pitches, and aspect ratios, and (2) the junction temperature and thermal resistance of 3D SiP with various TSV parameters. Useful design charts and guidelines are provided for engineering practice convenient.

Copyright © 2009 by ASME

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