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TSV Interposers With Embedded Microchannels for 3D IC and LED Integration

[+] Author Affiliations
John Lau, Heng-Chieh Chien, Ray Tain

Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan

Paper No. IPACK2011-52204, pp. 297-304; 8 pages
doi:10.1115/IPACK2011-52204
From:
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 2
  • Portland, Oregon, USA, July 6–8, 2011
  • ISBN: 978-0-7918-4462-5
  • Copyright © 2011 by ASME

abstract

A low-cost (with bare chips), high cooling ability and very low pressure drop 3D IC integration system-in-package (SiP) is designed and described. This system consists of a silicon interposer with through-silicon vias (TSV) and embedded fluidic microchannels, which carries all the Moore’s law chips and optical devices on its top and bottom surfaces. TSVs in the Moore’s law chips are optional but should be avoided. This novel structural design offers potential solutions for high-power, high-performance, high pin-count, ultra fine-pitch, small real-estate, and low-cost 3D IC SiP applications.

Copyright © 2011 by ASME
Topics: Microchannels

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