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Enhanced Thermal Map Prediction and Floor Plan Optimization in Electronic Devices Considering Sub-Continuum Thermal Effects

[+] Author Affiliations
David Romero, Aydin Nabovati, Daniel P. Sellan, Cristina H. Amon

University of Toronto, Toronto, ON, Canada

Gamal Refai-Ahmed

University of Texas at Arlington, Arlington, TX

Saeed Ghalambor, Niket Shah, Dereje Agonafer

Advanced Micro Devices, Inc., Markham, ON, Canada

Paper No. IPACK2011-52161, pp. 241-249; 9 pages
doi:10.1115/IPACK2011-52161
From:
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 2
  • Portland, Oregon, USA, July 6–8, 2011
  • ISBN: 978-0-7918-4462-5
  • Copyright © 2011 by ASME

abstract

In current and next-generation semiconductor electronic devices, sub-continuum heat transfer effects and non-uniform power distribution across the die surface lead to large temperature gradients and localized hot spots on the die. These hot spots can adversely affect device performance and reliability. In this work, we propose an enhanced method for thermal map prediction that considers sub-continuum thermal transport effects and show their impact in floor plan optimization. Sub-continuum effects are expressed in terms of an effective thermal conductivity. We introduce and calibrate a 2D thermal model of the die for fast simulation of thermal effects under non-uniform power generation scenarios. The calibrated 2D model is then used to study the impact of the effective thermal conductivity on the thermal map prediction and floor plan optimization. Results show that sub-continuum effects radically change both the predicted thermal performance and the optimal floor plan configurations.

Copyright © 2011 by ASME

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