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Estimation of Power Integrity Impact to Low Power Processor Performance Through Pre-Silicon Simulation and Post-Silicon Measurements

[+] Author Affiliations
Christopher Pan

Futurewei Technologies Inc., Santa Clara, CA

Amirali Shayan, Mikhail Popovich, Kevin Bowles

Qualcomm Inc., San Diego, CA

Paper No. IPACK2011-52291, pp. 681-684; 4 pages
doi:10.1115/IPACK2011-52291
From:
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems
  • ASME 2011 Pacific Rim Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Systems, MEMS and NEMS: Volume 1
  • Portland, Oregon, USA, July 6–8, 2011
  • ISBN: 978-0-7918-4461-8
  • Copyright © 2011 by ASME

abstract

The impact of power integrity on processor performance is critical in nano-scale era. We proposed the enhanced pre-silicon simulation to accurately capture the power delivery quality. The post silicon performance measurements correlates well with pre-silicon analysis and demonstrate that power integrity could impact performance up to 15% in low and high frequencies.

Copyright © 2011 by ASME

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