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CMORE: Fast Track From Lab to Fab

[+] Author Affiliations
Lou Hermans

IMEC, Leuven, Belgium

Raffa Borzi

IMEC US, San Jose, CA

Paper No. MicroNano2008-70225, pp. 773-780; 8 pages
doi:10.1115/MicroNano2008-70225
From:
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • Clear Water Bay, Kowloon, Hong Kong, June 3–5, 2008
  • Conference Sponsors: Nanotechnology Institute
  • ISBN: 0-7918-4294-0 | eISBN: 0-7918-3819-6
  • Copyright © 2008 by ASME

abstract

Within the CMORE program IMEC translates proven, Si technology based device concepts and process flows in industrially and commercially viable products and manufacturing flows. Si based IC processing technologies are, and will continue for a long time to be at the basis of many product innovations. Miniaturization and integration have proven to be powerful tools for the conception of novel products. These technologies are usually referred to a “Heterogeneous Integration” or “More Then Moore” in contrast to the pure CMOS scaling referred to as “More Moore”. Many of these new products combine high performance, multiple functions and compactness with consumer price levels. In other cases, miniaturization leads to unprecedented performances, resulting in products which were not feasible before. New device concepts are often generated at university, governmental or industrial laboratories. Although these environments are very well suited for proving technical feasibility, they are often less well equipped and organized for product development and the development of corresponding Si processing flow. On the other hand the prime focus of Si or MEMS foundries, be it merchant or captive, is wafer throughput, resulting in little interest for allocating processing capacity to product and process development, when product market acceptance still has to be proven and high volume production is still questionable. In addition development activities introduce risks on contamination and equipment failures leading to a reduction of the fab capacity. This gap between “proof-of-concept” and volume manufacturing offers new opportunities for R&D fabs traditionally active in CMOS scaling. These “development and prototyping” fabs have the infrastructure, processing know-how and procedures in place to efficiently translate device concepts into products and to develop industrially viable fabrication processes. In addition they have the flexibility and experience to introduce very quickly new materials and associated equipment, while keeping in mind compatibility with the industrial foundry environment, where final production will take place. Close cooperation with material and equipment suppliers is very important in that respect. In many projects executed at IMEC, wafer scale interconnects and/or wafer scale packaging are important aspects of the final device and therefore should be included from the start of the project. In this paper the IMEC approach and capabilities will be presented and illustrated with a number of past and ongoing projects.

Copyright © 2008 by ASME

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