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Wafer Bonding Processes for the Manufacture of Microsystems

[+] Author Affiliations
Tony Rogers, Nick Aitken

Applied Microengineering Limited, Didcot, Oxfordshire, UK

Paper No. MicroNano2008-70292, pp. 705-710; 6 pages
doi:10.1115/MicroNano2008-70292
From:
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • Clear Water Bay, Kowloon, Hong Kong, June 3–5, 2008
  • Conference Sponsors: Nanotechnology Institute
  • ISBN: 0-7918-4294-0 | eISBN: 0-7918-3819-6
  • Copyright © 2008 by ASME

abstract

Wafer bonding is a widely used step in the manufacture of Microsystems, and serves several purposes: • Structural component of the MEMS device. • First level packaging. • Encapsulation of vacuum or controlled gas. In addition the technology is becoming more widely used in IC fabrication for wafer level packaging (WLP) and 3D integration. It is also widely used for the fabrication of micro fluidic structures and in the manufacture of high efficiency LED’s. Depending on the application, temperature constraints, material compatibility etc. different wafer bonding processes are available, each with their own benefits and drawbacks. This paper describes various wafer bonding processes that are applicable, not only to silicon, but other materials such as glass and quartz that are commonly used in MEMS devices. The process of selecting the most appropriate bonding process for the particular application is presented along with examples of anodic, glass frit, eutectic, direct, adhesive and thermo-compression bonding. The examples include appropriate metrology for bond strength and quality. The paper also addresses the benefits of being able to treat the wafer surfaces in-situ prior to bonding in order to improve yield and bond strength, and also discusses equipment requirements for achieving high yield wafer bonding, along with high precision alignment accuracy, good force and temperature uniformity, high wafer throughput, etc. Some common problems that can affect yield are identified and discussed. These include local temperature variations, that can occur with anodic bonding, and how to eliminate them; how to cope with materials of different thermal expansion coefficient; how best to deal with out-gassing and achieve vacuum encapsulation; and procedures for multi-stacking wafers of differing thicknesses. The presentation includes infra-red and scanning acoustic microscopy images of various bond types, plus some examples of what can go wrong if the correct manufacturing protocol is not maintained.

Copyright © 2008 by ASME

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