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Back-Side Wafer Grinding Quality Affecting Back-End Assembly Process for LCD Driver ICs

[+] Author Affiliations
Mu-Chun Wang

Ming Hsin University of Science & Technology, Hsin-Chu; National Taipei University of Technology, Taipei, Taiwan, R.O.C.

Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang

National Taipei University of Technology, Taipei, Taiwan, R.O.C.

Kuo-Shu Huang

Ming Hsin University of Science & Technology, Hsin-Chu; Generalplus Technology Inc., Hsinchu, Taiwan, R.O.C.

Paper No. MicroNano2008-70014, pp. 557-561; 5 pages
doi:10.1115/MicroNano2008-70014
From:
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • 2008 Second International Conference on Integration and Commercialization of Micro and Nanosystems
  • Clear Water Bay, Kowloon, Hong Kong, June 3–5, 2008
  • Conference Sponsors: Nanotechnology Institute
  • ISBN: 0-7918-4294-0 | eISBN: 0-7918-3819-6
  • Copyright © 2008 by ASME

abstract

Die size and thickness of IC substrate typically vary as a result of the various market demands while the semiconductor process and the product applications develop fast. In order to satisfy the market concerns, the improvement of wafer grinding and dicing saw technology is necessary to provide lighter, thinner and more reliable ICs. Generally, most of previous commercial ICs almost demonstrate the square profile, but some special applications such as liquid-crystal-display (LCD) driver ICs request approximate rectangle shape. Furthermore, the ratios of length / width of these drivers are near 14:1, therefore, it is easy to be broken during IC assembly process and induce some reliability defects. However, the growth rate of digital panel displays is gradually increased. This global market is more and more impressed. In this study, how to promote the die strength and investigate the wafer grinding process for the previous LCD products is the main target. Through the analysis of data collection in die sizes, the suitable wafer grinding process is recommended in assembly line and some predictable trends for future panel IC applications are also exposed.

Copyright © 2008 by ASME

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