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CMOS Compatible Wafer-Scale Encapsulation MEMS Resonators

[+] Author Affiliations
Bongsang Kim, Matthew A. Hopcroft, Renata Melamud, Chandra M. Jha, Manu Agarwal, Saurabh A. Chandorkar, Thomas W. Kenny

Stanford University, Stanford, CA

Paper No. IPACK2007-33234, pp. 499-504; 6 pages
doi:10.1115/IPACK2007-33234
From:
  • ASME 2007 InterPACK Conference collocated with the ASME/JSME 2007 Thermal Engineering Heat Transfer Summer Conference
  • ASME 2007 InterPACK Conference, Volume 1
  • Vancouver, British Columbia, Canada, July 8–12, 2007
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-4277-0 | eISBN: 0-7918-3801-3
  • Copyright © 2007 by ASME

abstract

A unique MEMS encapsulation process on the use of epipolysilicon as a packaging and sealing layer is demonstrated. This process provides a very clean and stable environment for MEMS, is compatible with CMOS integration, and can be carried out in a conventional CMOS facility with standard tools. Silicon resonators fabricated inside the ‘epi-seal’ encapsulation showed quality factors over 10,000 and commercial level long-term stability (ppm level drift for over 1 year of operation). In addition, several modifications and improvements, such as Si-SiO2 composite resonators for reduced temperature coefficient of frequency and thermal isolated anchors for direct temperature control were successfully added to this process for improvements in resonator stability over temperature.

Copyright © 2007 by ASME

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