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Thermal Conductivity Model for Nearly Pure and Doped Thin Silicon Layers at High Temperatures

[+] Author Affiliations
M. Asheghi, K. E. Goodson

Stanford University, Stanford, CA

Paper No. IMECE2003-41623, pp. 847-853; 7 pages
  • ASME 2003 International Mechanical Engineering Congress and Exposition
  • Electronic and Photonic Packaging, Electrical Systems and Photonic Design, and Nanotechnology
  • Washington, DC, USA, November 15–21, 2003
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-3714-9 | eISBN: 0-7918-4663-6, 0-7918-4664-4, 0-7918-4665-2
  • Copyright © 2003 by ASME


Simulation of the temperature field in Silicon-on-insulator (SOI) transistors can benefit from better models and data for thermal conduction in pure and doped semiconducting materials. This work develops simple algebraic expressions to account for the reduction in thermal conductivity due to the size effect and to the presence of dopant impurities. The model applies to temperatures above 300 K and the results are compared with experimental data for pure and doped silicon layers.

Copyright © 2003 by ASME



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