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Development of Compact Models for Electronics Cooling: Using the Multigrid Operator to Generate Reduced Order Description of Devices

[+] Author Affiliations
Prabhu Sathyamurthy, Manoj Nagulapally, Rajesh Nair

Fluent, Inc., Lebanon, NH

Paper No. IMECE2003-42372, pp. 671-677; 7 pages
  • ASME 2003 International Mechanical Engineering Congress and Exposition
  • Electronic and Photonic Packaging, Electrical Systems and Photonic Design, and Nanotechnology
  • Washington, DC, USA, November 15–21, 2003
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-3714-9 | eISBN: 0-7918-4663-6, 0-7918-4664-4, 0-7918-4665-2
  • Copyright © 2003 by ASME


The need for compact models for ICs is a well-recognized problem in electronics cooling simulations of systems containing multiple PCBs and many devices per board. The disparate length scales inherent in the problem and the necessity of resolving these size scales renders the computational problem intractable. Many resistance-capacitance (RC) network compact models have been proposed in the literature. We present a methodology to automatically construct both the topology and characteristics of the reduced-order or compact models of devices (primarily Integrated Circuit (IC) packages) for use in system-level simulations using the multigrid operator. The multigrid technique has been extensively used over the past 20 years to accelerate the solution of liner systems. In addition to automatically generating both the RC network topology and its values, the procedure is general enough to be applicable for complex IC device types like Multi-Chip Modules (MCMs), stack up dies, distributed sources on the die, DC-DC converters and devices such as hard disk drives.

Copyright © 2003 by ASME



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