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A 5.8GHz Band-Pass Filter With an Active Inductor Through 0.18μm Full-CMOS Process for Wireless Transceivers

[+] Author Affiliations
Mu-Chun Wang

National Taipei University of Technology, Taipei, Taiwan, R.O.C.; Ming Hsin University of Science & Technology, Hsin-Chu, Taiwan, R.O.C.

Zhen-Ying Hsieh, Shuang-Yuan Chen, Heng-Sheng Huang

National Taipei University of Technology, Taipei, Taiwan, R.O.C.

Cheng-Yi Ke

Ming Hsin University of Science & Technology, Hsin-Chu, Taiwan, R.O.C.

Paper No. MNC2007-21086, pp. 315-318; 4 pages
doi:10.1115/MNC2007-21086
From:
  • 2007 First International Conference on Integration and Commercialization of Micro and Nanosystems
  • First International Conference on Integration and Commercialization of Micro and Nanosystems, Parts A and B
  • Sanya, Hainan, China, January 10–13, 2007
  • Conference Sponsors: Nanotechnology Institute
  • ISBN: 0-7918-4265-7 | eISBN: 0-7918-3794-7
  • Copyright © 2007 by ASME

abstract

Substituting the active inductor for the passive inductor to integrate the 5.8GHz bandpass filter into a system-on-chip (SoC) circuit is a feasible solution to reduce the filter chip area, increasing the application competition. The bandpass filter circuit in simulation with TSMC 0.18um CMOS process models and Agilent simulation software exhibits the good performance such as an input return loss (S11 ) of −34.26dB, an output return loss (S22 ) of −17.49dB, a bandpass gain (S21 ) of −4.33dB, a noise figure (NF) of 18.91dBm, a 1-dB compression point (P1dB) of −23dBm, a third-order intercept point (IIP3 ) of −15.83dBm, and the power dissipation in 19.44mW under 1.8V power-supply operation. In addition, the 3-dB bandpass bandwidth is 300MHz. The final dimension of this chip is approximate to 680×530μm2 .

Copyright © 2007 by ASME

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