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Bulk Micromachining of High Index Silicon Wafers and Possible Applications in Microchannels and Diffractive Elements

[+] Author Affiliations
W. Calleja-Arriaga, C. Zúñiga-Islas, P. Rosales-Quintero, J. De la Hidalga-Wade, C. Reyes-Betanzo, A. Torres-Jacome, M. Linares-Aranda

INAOE, Tonantzintla, Puebla, Mexico

Paper No. ICNMM2007-30189, pp. 443-448; 6 pages
  • ASME 2007 5th International Conference on Nanochannels, Microchannels, and Minichannels
  • ASME 5th International Conference on Nanochannels, Microchannels, and Minichannels
  • Puebla, Mexico, June 18–20, 2007
  • Conference Sponsors: Nanotechnology Institute
  • ISBN: 0-7918-4272-X | eISBN: 0-7918-3800-5
  • Copyright © 2007 by ASME


In this silicon bulk micromachining project we are evaluating new approaches to develop well-controlled 3-D microstructures for microfluidics and diffractive elements. Several approaches have been fabricated and reported using rectangular structures on (0 0 1) and (0 1 1) silicon wafers. In this work, n-type, 2–5 ohm-cm, two inch, 300 μ-thick, high index (1 1 3), (1 1 4), ( 5 5 12), (0 1 1) silicon wafers were used, which were produced from [1 1 2] ingots. Most micromachined structures compatible in Microsystems are fabricated on (0 0 1) and (0 1 1) wafers and rarely using high index wafers. Several sophisticated microstructures maybe fulfilled by using this kind of substrates with different crystallographic orientations. In our experimental work, the etching pattern was designed including several polygon-like structures to analyze the resulting morphology and crystallographic planes developed during a long-time etching. One of them, an array of 10 squared structures is arranged as follows: the first square is aligned parallel/perpendicular to the (0 1 1) main flat and then the next squares were slanted ranging from 5° till 45° in 5° steps. We have developed an experimental set using different KOH-H2O dilution at 60°C. All the experimental procedure was developed at the same time on (0 0 1) and (0 1 1) silicon wafers, which were used as control samples. Our etching mask containing several polygon-like structures was transferred parallel to the main (0 1 1) flat of the low and high index wafers. We are reporting the etching of several structures, watching the roughness evolution of the walls and bottom surfaces, with the main purpose of developing microstructures for microfluidics and integrated optics applications. In this way we have observed a couple of interesting structures whose very smooth walls could be used to develop a very simple fabrication procedure of blazed diffraction gratings for infrared applications.

Copyright © 2007 by ASME



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