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Effects of Void, Crack, and PCB Thickness on the Solder Joint Reliability of Wafer-Level Chip-Scale Package (WLCSP) Assemblies

[+] Author Affiliations
John Lau

Agilent Technologies, Inc., Santa Clara, CA

Yida Zou, Sergio Camerlo

Cisco Systems, San Jose, CA

Paper No. IMECE2002-39495, pp. 195-202; 8 pages
doi:10.1115/IMECE2002-39495
From:
  • ASME 2002 International Mechanical Engineering Congress and Exposition
  • Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology
  • New Orleans, Louisiana, USA, November 17–22, 2002
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-3648-7 | eISBN: 0-7918-1691-5, 0-7918-1692-3, 0-7918-1693-1
  • Copyright © 2002 by ASME

abstract

The creep analyses of solder-bumped wafer-level chip-scale package (WLCSP) on printed circuit board (PCB) subjected to temperature cycling loading are presented. Emphasis is placed on the effects of PCB thickness on the solder joint reliability of the WLCSP assembly. Also, the effects of crack-length on the crack tip characteristics such as the J-integral in the WLCSP solder joint are studied by the fracture mechanics method. Finally, the effects of voids on the crack growth in the WLCSP solder joint are investigated.

Copyright © 2002 by ASME

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