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Chemical Mechanical Polishing of Silicon Wafers: Finite Element Analysis of Wafer Flatness

[+] Author Affiliations
X. H. Zhang, Z. J. Pei

Kansas State University

Graham R. Fisher

MEMC Electronic Materials, Inc.

Paper No. IMECE2005-80271, pp. 893-900; 8 pages
doi:10.1115/IMECE2005-80271
From:
  • ASME 2005 International Mechanical Engineering Congress and Exposition
  • Manufacturing Engineering and Materials Handling, Parts A and B
  • Orlando, Florida, USA, November 5 – 11, 2005
  • Conference Sponsors: Manufacturing Engineering Division and Materials Handling Division
  • ISBN: 0-7918-4223-1 | eISBN: 0-7918-3769-6
  • Copyright © 2005 by ASME

abstract

Silicon is the primary semiconductor material used to fabricate integrated circuits. The quality of microchips depends directly on the quality of silicon wafers. A series of processes are required to manufacture the high-quality silicon wafers. Chemical mechanical polishing is a necessary step to achieve the required wafer flatness. In this paper, a finite element analysis has been conducted to study the effects of influencing factors (including Young’s modulus and Poisson’s ratio of the polishing pad, thickness of the pad, and polishing pressure) on the wafer flatness.

Copyright © 2005 by ASME

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