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Wafer Scale Modeling and Control for Yield Improvement in Wafer Planarization

[+] Author Affiliations
Sutee Eamkajornsiri, Ranga Narayanaswami, Abhijit Chandra

Iowa State University, Ames, IA

Paper No. IMECE2002-33454, pp. 301-310; 10 pages
  • ASME 2002 International Mechanical Engineering Congress and Exposition
  • Microelectromechanical Systems
  • New Orleans, Louisiana, USA, November 17–22, 2002
  • Conference Sponsors: Microelectromechanical Systems
  • ISBN: 0-7918-3642-8 | eISBN: 0-7918-1691-5, 0-7918-1692-3, 0-7918-1693-1
  • Copyright © 2002 by ASME


Chemical mechanical polishing (CMP) is a planarization process that produces high quality surfaces both locally and globally. It is one of the key process steps during the fabrication of very large scale integrated (VLSI) chips in integrated circuit (IC) manufacturing. CMP consists of a chemical process and a mechanical process being performed together to reduce height variation across a wafer. High and reliable wafer yield, which is dependent upon uniformity of the material removal rate across the entire wafer, is of critical importance in the CMP process. In this paper, the variations in material removal rate (MRR) variation across the wafer are analytically modeled assumimg a rigid wafer and a flexible polishing pad. The wafer pad contact is modeled as the indentation of a rigid indenter on an elastic half-space. Load and curvature control strategies are investigated for improving the wafer yield. The notion of curvature control is entirely new and has not been addressed in the literature. The control strategy is based on minimizing a moment function that represents the wafer curvature and the height of the oxide layer left for material removal. Simulation results indicate that curvature control can improve wafer yield significantly, and is more effective than just the load control.

Copyright © 2002 by ASME



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