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Reliability Study of Package Stacking Under Thermomechanical Conditions

[+] Author Affiliations
Jiansen Zhu, Tommi Reinikainen

Nokia Research Center

Kazuo Ishibahsi

Nokia

Paper No. IMECE2005-81822, pp. 93-97; 5 pages
doi:10.1115/IMECE2005-81822
From:
  • ASME 2005 International Mechanical Engineering Congress and Exposition
  • Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology
  • Orlando, Florida, USA, November 5 – 11, 2005
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-4217-7 | eISBN: 0-7918-3769-6
  • Copyright © 2005 by ASME

abstract

With the increased requirements for smaller size and more functions, hand held devices will use more and more small components to reduce the PWB areas. One of the solutions is stacked package. There are two kinds of stacked packages: one is die stacking and the other is package stacking. The package stacking is a more flexible solution for device manufacturers because the packages to be stacked could come from different vendors. All the packages can be tested separately before stacking so that there is no need for device manufacturers to acquire good dies or intellectual properties for die testing. In this study, the focus will be on the package stacking. The package stacking can be ASIC and memory stacking or memory and memory stacking. Three different stacked packages are selected for this study. Here the focus is on FEA modeling and simulation method for package stacking. Finally, the simulation results are compared with the results of thermal cycling test. A reasonable correlation is achieved based on current simulation method.

Copyright © 2005 by ASME

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