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Board Deflection/Strain Instead of Acceleration Measurements for Circuit Board FE Shock Model Validation

[+] Author Affiliations
Frank Z. Liang, Richard L. Williams, Wade Hezeltine

Intel Corporation

Paper No. IMECE2005-80093, pp. 45-50; 6 pages
  • ASME 2005 International Mechanical Engineering Congress and Exposition
  • Electronic and Photonic Packaging, Electrical Systems Design and Photonics, and Nanotechnology
  • Orlando, Florida, USA, November 5 – 11, 2005
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-4217-7 | eISBN: 0-7918-3769-6
  • Copyright © 2005 by ASME


Modal method and direct time integration analyses are two common FE approaches to simulate circuit board shock response. When using these methods, the model validation depends on comparing the simulated result with either frequency or time domain response. In the past, modal test and analysis has been the final model validation step for using modal method. We believe a shock simulation model should be revalidated following the modal validation, since the modal parameters are global measurements and the second level interconnect (SLI) reliability in shock is more related to its local board bending condition. A revalidation can be done by comparing model simulation acceleration with direct acceleration measurements on the circuit board. However, the board level acceleration may not provide an accurate picture of board level deflection or strain, leading to an incorrect conclusion of the SLI stress predicted by a model. This paper compares the application of acceleration validation method and the method using board deflection and board strain time history to achieve model validation.

Copyright © 2005 by ASME



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