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Modelling the Performance of Lead-Free Solder Interconnects for Copper Bumped Flip-Chip Devices

[+] Author Affiliations
Hua Lu, Chris Bailey

University of Greenwich, London, UK

Paper No. IPACK2003-35356, pp. 605-610; 6 pages
  • ASME 2003 International Electronic Packaging Technical Conference and Exhibition
  • 2003 International Electronic Packaging Technical Conference and Exhibition, Volume 1
  • Maui, Hawaii, USA, July 6–11, 2003
  • Conference Sponsors: Electronic and Photonic Packaging Division
  • ISBN: 0-7918-3690-8 | eISBN: 0-7918-3674-6
  • Copyright © 2003 by ASME


Traditionally, before flip chips can be assembled the dies have to be attached with solder bumps. This process involves the deposition of metal layers on the Al pads on the dies and this is called the under bump metallurgy (UBM). In an alternative process, however, Copper (Cu) columns can be used to replace solder bumps and the UBM process may be omitted altogether. After the bumping process, the bumped dies can be assembled on to the printed circuit board (PCB) by using either solder or conductive adhesives. In this work, the reliability issues of flip chips with Cu column bumped dies have been studied. The flip chip lifetime associated with the solder fatigue failure has been modeled for a range of geometric parameters. The relative importance of these parameters is given and solder volume has been identified as the most important design parameter for long-term reliability. Another important problem that has been studied in this work is the dissolution of protection metals on the pad and Cu column in the reflow process. For small solder joints the amount of Cu which dissolves into the molten solder after the protection layers have worn out may significantly affect solder joint properties.

Copyright © 2003 by ASME



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