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Evaluation of Damage Process Near Interfaces During Nanoscratch Test

[+] Author Affiliations
Tadahiro Shibutani, Qiang Yu, Masaki Shiratori, Takeshi Akai

Yokohama National University, Yokohama, Japan

Paper No. IPACK2005-73159, pp. 1923-1927; 5 pages
doi:10.1115/IPACK2005-73159
From:
  • ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference
  • Advances in Electronic Packaging, Parts A, B, and C
  • San Francisco, California, USA, July 17–22, 2005
  • Conference Sponsors: Heat Transfer Division and Electronic and Photonic Packaging Division
  • ISBN: 0-7918-4200-2 | eISBN: 0-7918-3762-9
  • Copyright © 2005 by ASME

abstract

In multi-layered films on a silicon substrate for an advanced electronics devices, interfacial fracture often takes place and its strength (thin film adhesion) is very important in reliability. This study aims that the mechanism of damage initiation during nanoscratch test is examined for Si3 N4 /Cu/TaN films on a silicon substrate. In the case that the interfacial strength is weak, the interfacial damage initiates before surface film failure. In the case of edge-forward scratching, there are little effects of the rates of normal stress and scratching on the critical load. Contact analysis without friction for the system consisting of the tip, films and substrate reveals that the peak of shear stress appears on the track near the tip. Face-forward scratching shows the same behavior of damage as edge-forward scratching. Stress states acting on the interface in scratch tests suggest that the damage initiates when shear stress reaches the critical value.

Copyright © 2005 by ASME

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